The structure consists of leaf cells from a library depending on the manufacturer of the electronic circuits.
Generally the language VHDL is used to describe both the behaviour and the structure. Other languages as Verilog and EDIF may be used.
ModelSim is a development environment for VHDL och Verilog.
Galileois a synthesis tool used to translate a behaviour into a structure using a particular library of leaf cells.
PowerPCB is a synthesis tool using structure an a library of vircuits to amually or automatically create printed circuit boards.